There is no standard way to run SystemVerilog code. Most shops resort to writing simple bash scripts and makefiles unique to each project, simulator and test bench. The bash scripts need to be extended to run regressions, and the output reviewed using grep to search for results (pass/fail, reasons for fail). Tests that were intended to run over the weekend can fail due to errors in the bash scripts, an all too frequent and time-wasting problem.
Datum uses Python software and descriptor files using yaml format to execute simulation and regression tests. The descriptor files are automatically generated by the code templates we use, leading to consistent and reliable results. Because we aren’t starting from scratch each time, significant time is saved.
Vivado allows users to encrypt a project and send it to Datum, so the design details remain private within the design company, but allowing us to handle all aspects of the DV. We handle the VIPs, test benches, environments, and verification plan required for the specification. We conduct the simulation and testing on our infrastructure integrate bug reports into the client’s existing issues database. We provide regression and coverage reports.
This approach provides a clear delineation between the development, handled entirely by the customer, and design verification, handled entirely by us, without disclosing the details of your design.